Analogue Multiplier References
Updated 27 February 2003
    
    
  1. Abu-Zeid, M.M., H. Groendijk, and A. Willemse, "Temperature-Compensated FET Multiplier," Electronics Letters, Vol. 4, No. 16, 9 Aug 1968.
    
    
  2. Bilotti, A., "Applications of a Monolithic Analog Multiplier," IEEE Journal of Solid-State Circuits, Vol. SC-3, No. 4, Dec 1968, pp. 373-380.
    
    
  3. Blalock, B.J. and S.A. Jackson, "A 1.2-V CMOS Four-Quadrant Analog Multiplier," 1999 Southwest Symposium on Mixed-Signal Design, pp. 1-4.
    
    
  4. Bruccoleri, M., G. Cosentino, M. Demicheli, and S. Portaluri, "Low Consumption Analog Multiplier," European Patent EP0720112, 7 Mar 1996.
    
    
  5. Bruccoleri, M., G. Cosentino, M. Demicheli, and S. Portaluri, "Low Consumption Analog Multiplier," US Patent 5,714,903, 3 Feb 1998.
    
    
  6. Bruggemann, H., "Feedback Stabilized Four-Quadrant Analog Multiplier," IEEE Journal of Solid State Circuits, Vol. 5, No. 4, Aug 1970, pp. 150-159.
    
    
  7. Dow, R.N., "Complementary Analog Multiplieer Circuits with Differential Ground Referenced Outputs and Switching Capability," US Patent #5,389,840, 14 Feb 1995.
    
    
  8. Filanovsky, I.M. and H.P. Baltes, "Simple CMOS Analog Square-Rooting and Squaring Circuits," IEEE Transactions on Circuits and Systems, Vol. 39, No. 4, Apr 1992, pp. 312-315.
    
    
  9. Frater, R.H., "Accurate Wideband Multiplier-Square-Law Detector," Review of Scientific Instruments, Vol. 35, No. 7, Jul 1964, pp. 810-813.
    
    
  10. Gilbert, B., "A High-Performance Mololithic Multiplier Using Active Feedback," IEEE Journal of SOlid-State Circuits, Vol. SC-9, No. 6, Dec 1974, pp. 364-373.
    
    
  11. Gilbert, B., "A Precise Four-Quadrant Multiplier with Subnanosecond Response," IEEE Journal of Solid-State Circuits, Vol. SC-3, No. 4, Dec 1968, pp. 365-373.
    
    
  12. Gilbert, B., "Four-Quadrant Multiplier Circuit," US Patent #3,689,752, 5 Sep 1972.
    
    
  13. Gilbert, B., "High-Accuracy Vector-Difference and Vector-Sum Circuits," Electronics Letters, Vol. 12, No. 11, 27 May 1976, pp. 293-294.
    
    
  14. Gilbert, B., "Translinear Circuits: A Proposed Classification," Electronics Letters, Vol. 11, No. 1, 9 Jan 1975, pp. 14-16.
    
    
  15. Gilbert, B., "Translinear Circuits - 25 Years On. Part I: The Foundations," Electronic Engineering, Aug 1993, pp. 21-24.
    
    
  16. Gilbert, B., "Translinear Circuits - 25 Years On. Part II," Electronic Engineering, Sep 1993, pp. 51-53.
    
    
  17. Gilbert, B., "Translinear Circuits - 25 Years On. Part III: Developments," Electronic Engineering, Oct 1993, pp. 51-56.
    
    
  18. Gilbert, B. and P. Holloway, "A Wideband Two-Quadrant Analog Multiplier," Proceedings of the 1980 IEEE International Solid-States Circuits Conference, pp. 200-201.
    
    
  19. Hejhall, R., "MC1596 Balanced Modulator," Motorola, Phoenix, AZ, USA.
    
    
  20. Ismail, A.M. and A.M. Soliman, "A Novel CMOS Four Quadrant Multiplier Based on Linearization of the Long Tail Differential Pair," 2000 IEEE International Symposium on Circuits and Systems (ISCAS 2000), Vol. 5, pp. 485-488.
  21. Kertis, R.A., "Method and Apparatus for Providing Analog Differential Signal Multiplication with a Substantially Linear Response Over a Relatively Large Range of Multiplication," US Patent 5,931,899, 3 Aug 1999.
    
    
  22. Khachab, N.I. and M. Ismail, "MOS Miltiplier/Divider Cell for Analogue VLSI," Electronics Letters, Vol. 25, No. 23, 9 Nov 1989, pp. 1550-1552.
    
    
  23. Kim, C.W. and S.B. Park, "New Four-Quadrant CMOS Analogue Multiplier," Electronics Letters, Vol. 23, No. 24, 19 Nov 1987, pp. 1268-1270.
    
    
  24. Kimura, K., "A Bipolar Four-Quadrant Analog Quarter-Square Multiplier Consisting of Unbalanced Emitter-Coupled Pairs and Expansions of Its Input Ranges," IEEE Journal of Solid State Circuits, Vol. 29, No. 1, Jan 1994, pp. 46-55.
    
    
  25. Kimura, K., "Analysis of 'An MOS Four-Quadrant Analog Multiplier Using Simple Two-Input Squaring Circuits with Source Followers'," IEEE Transactions on Circuits and Systems, Vol. 41, No. 1, Jan 1994, pp. 72-75.
    
    
  26. Maula, K.L.I., "Variable Gain Control Circuit for Linear Applications," Electronics Letters, Vol. 35, No. 20, 28 Sep 2000, pp. 1682-1683.
    
    
  27. Morton, R.R.A., "A Simple D.C. to 10 Mc/s Analogue Multiplier," Journal of Scientific Instruments, Vol. 43, No. 2, Feb 1966, pp. 165-168.
    
    
  28. Ramirez-Angulo, J., R.G. Carvajal, and J. Martinez-Heredia, "1.4V Supply, Wide Swing, High Frequency CMOS Analogue Multiplier with High Current Efficiency," 2000 IEEE International Symposium on Circuits and Systems (ISCAS 2000), Vol. 5, pp. 533-536.
    
    
  29. Sheingold, D.H. (ed), "Multiplier Application Guide," Analog Devices, Norwood, MA, USA.
    
    
  30. Takashi, M., "Analog Multiplier," US Patent 5,886,916, 23 Mar 1999.
    
    
  31. Tanno, K., O. Ishizuka, and Z. Tang, "A 1-V, 1-Vp-p Input Range, Four-Quadrant Analog Multiplier Using Neuron-MOS Transistors," IEICE Transactions, Vol. E82-C, No. 5, May 1999, pp. 750-757.
    
    
  32. Tarim, T.B. and M. Ismail, "A Low Voltage CMOS Square Law Analog Multiplier," 1999 Southwest Symposium on Mixed-Signal Design, pp. 5-8.
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